A conventional typical protective relay of this type has a circuit which is illustrated in FIG. 1, which introduces a suppress signal 1 obtained from the sum of electric currents detected from two separate points of object to be protected, such as a power transformer connected in a power system, and a differential signal 2 obtained from the difference thereof to a difference ratio detector 3. When a decision is made that the differential signal 2 is greater than the suppress signal 1 by more than a predetermined ratio, the detector 3 produces an output signal b of high level. The differential signal 2 is also supplied to a level detector 4 which produces an output when the level of the differential signal becomes greater than a predetermined value, and to harmonic ratio detectors 5 and 6 which produce signals when the second harmonic component contained in the differential signal becomes greater than the fundamental wave component contained in the differential signal by more than a predetermined ratio. Output signal b of the detector 3 is supplied to a first input terminal of an AND gate 9, output signal a of the detector 5 is supplied to a second inverted logic input of the gate 9, which performs an AND operation with these signals, and the resulting signal is supplied to an OR gate 10 to perform an OR operation with the output signal c of the detector 4. The gate 10 is connected for providing an actuate signal d to a protective device or circuit breaker which is not shown.
Output sighal e of the detector 6 is supplied to a delay circuit 7 which produces output signal of high level when the output signal e maintains the high level for more than a time duration Td. Output of the delay circuit 7 is supplied to a delay circuit 8 which continuously produces output signal of high level for a time duration Th when the output of the delay circuit 7 drops from high level to low level, and output of the delay circuit 8 is supplied to an input of an AND gate 11. Another input of the AND gate 11 is an inverted logic input which is served with the signal c of the detector 4. The AND gate 11 performs AND operation with these two inputs to produce a lock signal f to inhibit the operation of the circuit breaker which is not shown.
FIG. 2 illustrates operational waveforms of each of the portions of the circuit shown in FIG. 1. Let it be assumed that an abnormal condition occurs in the object to be protected at a time t.sub.O, and for a certain reason, after a time t.sub.f, the level of the differential signal 2 drops from a given level to the low level at the time t.sub.f as shown in FIG. 2. Differential quantity I.sub.D contained in the differential signals 2 starts to increase from the time t.sub.O in a vibrating manner, but decreases from the time t.sub.f. A the second harmonic component If.sub.2 is generated temporarily after the times t.sub.O and t.sub.f with substantial level caused by the transient response of a filter in the detector 5. During the period from time t.sub.O to time t.sub.f, therefore, the detector 4 produces the signal c of high level to inhibit the operation of gate 11, and the detector 5 produces the signal a to inhibit the operation of gate 9 so that the signal f is not produced. After the time t.sub.f has passed, however, the differential quantity I.sub.D decreases, and the detector 4 changes the signal c from high to low level. Therefore, the gate 11 is released from the inhibited condition, and the signal f is produced for blocking proper operation of the device. Such an erroneous operation may be prevented by increasing the delay time of the delay circuit 7. Increase in the delay time, however, presents such an inconvenience that the response time of the device is significantly delayed for proper fault protective operation.